1. Field of the Invention
The present invention relates to a voltage regulator circuit for holding an output voltage of a charge pump circuit in a semiconductor integrated circuit substantially constant.
2. Description of the Related Art
Typical examples of voltage regulators adapted to hold output voltages of charge pump circuits in semiconductor integrated circuits substantially constant are described in the following articles (1)-(3).
(1) In the article entitled "High-Voltage Regulation and Process Considerations for High-Density 5 V-only E.sup.2 PROM,s" by DUANE H. OTO et al., IEEE Journal of Solid-State Circuits, Vol. SC-18, No. 5, Oct. 1983, pp 532-538, the output voltage of the charge pump circuit is compared with a reference voltage to control a clock signal for the charge pump circuit.
(2) In the article entitled "Techniques for a 5-V-Only 64K EPROM Based Upon Substrate Hot-Electron Injection" by JAMES L. McCGREARY et al., IEEE Journal of Solid-State Circuits, Vol. SC-19, No. 1, Feb. 1984, pp 135-143, the output voltage of the charge pump circuit is applied to a plurality of MOS transistors to produce a control voltage which, in turn, is applied to the gate of a MOS transistor connected between the output node of the charge pump circuit and the supply voltage node so as to cause it to conduct. The output voltage is clamped by the MOS transistor.
(3) In the article entitled "A 19-ns 250-mW CMOS Erasable Programmable Logic Device" by JAGDISH PATHAK, IEEE Journal of Solid-State Circuits, Vol. SC-21, No. 5, Oct. 1986, pp 775-784, two N-channel MOS transistors, each of which has its gate and drain connected together, are connected in series between the output node and input node of the charge pump circuit to produce an output voltage of Vpp+2 Vtn (Vpp stands for a input voltage and Vtn stands for the threshold voltage of an N-channel MOS transistor).
However, the voltage-regulating N-channel MOS transistors used in the third article have a wide variability of threshold voltage because of the effect of back-gate bias. Thus, for a desired voltage regulating property it is difficult to determine the number of N-channel transistors to be connected in series. In addition, in case where a high voltage is abruptly output from the charge pump circuit and applied across the drain-source path of the N-channel MOS transistor, the transistor may be short-circuited. In such case, the voltage-regulating property of the voltage regulator circuit would be deteriorated because of the N-channel MOS transistor. In the worst case, the voltage regulation would become impossible. An integrated circuit incorporating the voltage-regulating N-channel MOS transistors is thus low in reliability.